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Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop With On-Chip Delay Measurement

机译：利用片上延迟测量验证电源噪声和延迟对平均电压降的依赖性的全芯片仿真模型

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Yasuhiro Ogasahara; Student Member; Takashi Enami; Masanori Hashimoto; Takashi Sato; Takao Onoye;
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年度 2010
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1. Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop With On-Chip Delay Measurement [J] . Ogasahara Y., Enami T., Hashimoto M., IEEE transactions on circuits and systems. II, Express briefs . 2007,第10期

机译：利用片上延迟测量验证电源噪声和平均电压降相关延迟的全芯片仿真模型
2. Distributed secondary voltage control for autonomous microgrids under additive measurement noises and time delays [J] . Lai Jingang, Lu Xiaoqing, Monti Antonello Generation, Transmission & Distribution, IET . 2019,第14期

机译：附加测量噪声和时间延迟下自主微电网的分布式二次电压控制
3. JSIR2S code for delayed radiation simulations: Validation against measurements at the JSITRIGA reactor [J] . Ambrozic K., Snoj L. Progress in Nuclear Energy . 2020,第Nova期

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4. Measurement results of delay degradation due to power supply noise well correlated with full-chip simulation [C] . Ogasahara, Y., Enami, Custom Integrated Circuits Conference, 2006 IEEE . 2006

机译：由电源噪声引起的延迟降级的测量结果与全芯片仿真密切相关
5. Novel measurement based load modeling and demand side control methods for fault induced delayed voltage recovery mitigation. [D] . Bai, Hua. 2010

机译：基于新的基于测量的负载建模和需求侧控制方法，用于缓解故障引起的延迟电压恢复。
6. A High Resolution On-Chip Delay Sensor with Low Supply-Voltage Sensitivity for High-Performance Electronic Systems [O] . Duo Sheng, Hsiu-Fan Lai, Sheng-Min Chan, 2015

机译：具有低电源电压灵敏度的高分辨率片上延迟传感器用于高性能电子系统
7. Measurement of On-chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase due to SSO [O] . Yasumichi Takai, Yasuhiro Ogasahara, Masanori Hashimoto, 2010

机译：片上I / O电源噪声的测量以及噪声幅度与SSO引起的延迟增加之间的相关性验证
8. Phase 2 - Improved Work Zone Design Guidelines and Enhanced Model of Travel Delays in Work Zones. Part I: Development of Digital Computer Simulation Model. Part II: Baseline Free-Flow Measurements for Diversion Analysis. Part III: Development of Design G [R] . Oner, E., Zwahlen, H. T. 2009

机译：第2阶段 - 改进工作区设计指南和增强的工作区旅行延误模型。第一部分：数字计算机仿真模型的发展。第二部分：导流分析的基线自由流动测量。第三部分：设计的发展

Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop With On-Chip Delay Measurement

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